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Commit Graph

308 Commits

Author SHA1 Message Date
Nick Lewycky
99f7499a05 Reimplement I32Ctz, I64Clz and I64Ctz without LZCNT or TZCNT. 2019-10-15 13:42:05 -07:00
Nick Lewycky
cafcfd3b50 cargo fmt 2019-10-15 13:07:44 -07:00
Nick Lewycky
cf3d2a830d Reimplement I32Clz without relying on LZCNT. 2019-10-15 12:50:59 -07:00
losfair
3de0c7763f Skip inline non-instruction data. 2019-10-15 22:12:08 +08:00
losfair
81d538ade2 Fix disp < 0 case. 2019-10-15 22:00:33 +08:00
losfair
ee88c459e5 Allow arbitrary size of disp. 2019-10-15 21:55:04 +08:00
Nick Lewycky
26a4f073f0 Implement F64Min and F64Max. 2019-10-14 14:15:18 -07:00
Nick Lewycky
06ffb00deb Reimplement F32Max. 2019-10-14 14:07:30 -07:00
Nick Lewycky
b886a41a85 Use temp_gprs instead of hard-coding RAX/RDX. 2019-10-14 13:53:30 -07:00
Nick Lewycky
5cee23455d Release the registers we acquire. Reformat. 2019-10-14 13:51:03 -07:00
Nick Lewycky
336dab7fd9 Don't use utility functions in F32Min implementation. 2019-10-14 13:46:55 -07:00
Nick Lewycky
765e1d3b9e Add XMM8--XMM15. These were added in x64. 2019-10-14 13:46:55 -07:00
Nick Lewycky
4b89e01806 Remove commented-out code that I added so as to not lose its history in git. Apply trivial cleanups and reformat. 
Remove expected test failure entries that are fixed so far.
 2019-10-14 13:46:55 -07:00
Nick Lewycky
963148fdce Fix F32Min for all cases including NaNs. 2019-10-14 13:46:55 -07:00
Nick Lewycky
8b937afc1f Add comments to indicate the implemention we'd like to have, but can't right now. 2019-10-14 13:46:55 -07:00
Nick Lewycky
0f712c90ab Don't allocate another register when it's safe to reuse dst. 2019-10-14 13:46:55 -07:00
Nick Lewycky
b75e5c0c7c When we know RDX is unavailable, use RAX instead. Should be fine here. 2019-10-14 13:46:55 -07:00
Nick Lewycky
d6eba03a2f Remove loc1/loc2. That intended refactoring didn't work out. 2019-10-14 13:46:55 -07:00
Nick Lewycky
555d933057 Initial commit, reimplementation of F32Min. Fixes F32Min(negative_zero, zero) issue. 
Also removes some previously-fixed i32 and i64 exclusions from the tests.
 2019-10-14 13:46:55 -07:00
losfair
a525907c60 Emit state information for internal breakpoints. 2019-10-14 20:23:10 +08:00
losfair
5499a69ddc Run cargo fmt on everything. 2019-10-13 20:02:47 +08:00
losfair
36f95fc660 Support emitting inline breakpoints in singlepass. 2019-10-11 21:05:42 +08:00
losfair
8ee4b7f7b0 Replace brk with undefined instruction. 2019-10-10 22:08:52 +08:00
Yaron Wittenstein
3489bfb9b9 renamed feature flag deterministic to deterministic-execution 2019-10-07 23:07:20 +03:00
Yaron Wittenstein
6ca5812798 When deterministic feature will be enabled (turned-off by default) it'll guarantee deterministic 
execution of wasm programs across different hardware/circumstances.
This is very useful for Blockchain projects having wasm smart-contracts

This is critical for Blockchain projects that require execution to be deterministic
in order to reach a consensus of the state transition of each smart-contract transaction.
 2019-10-07 16:58:58 +03:00
nlewycky
f63c706abc
Merge branch 'master' into feature/singlepass-atomicops 2019-10-02 16:46:59 -07:00
Nick Lewycky
ab76c2357f Delete dead (commented out) code. NFC. 2019-10-02 16:31:11 -07:00
Nick Lewycky
8e63d54fdb cargo fmt 2019-10-02 16:31:11 -07:00
Nick Lewycky
83b678bc36 Give this function a better name. 2019-10-02 16:31:11 -07:00
Nick Lewycky
11c5e0d71d Make the panics a bit more descriptive. 2019-10-02 16:31:11 -07:00
Nick Lewycky
ba68cfc2c6 Finish atomic operations for singlepass, excluding wait and notify. 2019-10-02 16:31:11 -07:00
Nick Lewycky
bc7e017188 Add atomic.rmw operations, excluding xchg and cmpxchg. 
Sizes are now ordered, to facilitate an assertion that one size is less (smaller) than another.

panic! error messages are provided for remaining emitter functions.
 2019-10-02 16:31:11 -07:00
Nick Lewycky
f021d59a0b Refactor out a compare-and-swap loop function. 2019-10-02 16:31:11 -07:00
Nick Lewycky
cd1d06f5a5 Initial working implementation of I32AtomicRmwAnd! 
Adds the ability to reserve a specific temp-gpr register. Needed for CMPXCHG which always uses RAX.
 2019-10-02 16:31:11 -07:00
Nick Lewycky
6937019b65 Use a compare-and-swap loop for AND. 
BUG: This might allocate RAX twice.
 2019-10-02 16:31:10 -07:00
Nick Lewycky
81895830f0 Add emitter for LOCK CMPXCHG so that we can emit compare-and-swap loops. 2019-10-02 16:31:10 -07:00
Nick Lewycky
efc89e829d Add i32 rmw add and sub. 2019-10-02 16:31:10 -07:00
Nick Lewycky
98f35ef84a Initial implementation of atomic load/store and i32 atomic rmw add. 2019-10-02 16:31:10 -07:00
Mark McCaskey
c77cbc1f40 Prepare for 0.8.0 release 2019-10-02 15:40:35 -07:00
Jordan Danford
9be72e6808 Fix some other files too 2019-09-30 22:50:04 -07:00
losfair
b304317682 More mov variants. 2019-09-30 01:01:15 +08:00
Heyang Zhou
dfb8989280
Merge branch 'master' into nlewycky/singlepass-add-zero 2019-09-29 12:52:26 +08:00
losfair
89d8b5a41c Fixes for aarch64. 2019-09-28 17:31:10 +08:00
Brandon Fish
c69cdeca9b Update cranelift backend to fork version 0.44.0 2019-09-25 23:37:39 -05:00
nlewycky
392a61ff12
Merge branch 'master' into nlewycky/singlepass-add-zero 2019-09-24 13:58:27 -07:00
Syrus
7bf306eb27 Use flat-square style in downloads button 2019-09-24 13:42:17 -07:00
Syrus
621ef56ab6 lmproved READMEs to use Azure Pipelines badges and better lgo 2019-09-24 13:36:31 -07:00
Nick Lewycky
be181f9119 Correct this test and simplify. 2019-09-24 10:54:23 -07:00
Nick Lewycky
07b5991080 No need to emit add of constant zero. 2019-09-23 15:01:19 -07:00
losfair
3dadbc15c9 Integer subset done. 2019-09-23 22:30:08 +08:00